I²C (Inter-Integrated Circuit), usually pronounced I-squared-C or I-two-C, is a short-distance, low-speed, bidirectional, two-wire serial communication protocol developed by Philips (now NXP Semiconductors) in the early 1980s. It is designed for communication between integrated circuits (ICs), especially on a printed circuit board (PCB). It is widely used in embedded systems due to its simplicity and low pin count requirement.
Key Features
- Two Signals: Uses only two signal lines for communication:
- SDA (Serial Data Line): Serial data line. Enables bidirectional data transfer.
- SCL (Serial Clock Line): Serial clock line. Carries clock signals that synchronize data transfer. It is usually controlled by the master device.
- Master-Slave Architecture
- Master: The device that initiates communication and generates the clock signal (SCL). It can send data or request data from the slave device.
- Slave: The device that is addressed by the master and responds to master commands. It can receive data from the master device or send data to the master device.
- Multi-Master Support: Allows multiple devices to assume the master role. Thanks to a collision detection and arbitration mechanism, it is decided which master will use the data bus if more than one master attempts to send data simultaneously.
I2C Protocol Connection Diagram (Analog Devices)
Addressing: Each slave device has a unique address on the bus (typically 7-bit, sometimes 10-bit). The master selects the slave device it wants to communicate with using this address.
Acknowledgement Mechanism (Acknowledgement - ACK / Not Acknowledge - NACK): After each data byte (8 bits) is transferred, the receiving device sends an ACK bit to confirm successful reception of data, or a NACK bit to indicate a problem (e.g., busy or unable to receive data).
- Speed Modes: Can operate at different speeds:
- Standard Mode: Up to 100 kbit/s
- Fast Mode (Fm): Up to 400 kbit/s
- Fast Mode Plus (Fm+): Up to 1 Mbit/s
- High-speed Mode (Hs-mode): Up to 3.4 Mbit/s
- Ultra Fast-mode (UFm): Up to 5 Mbit/s (unidirectional)
Open-Drain / Open-Collector Outputs: The SDA and SCL lines have Complementary Metal-Oxide Semiconductor (CMOS) or Transistor-Transistor Logic (TTL) outputs. This allows multiple devices to be connected to the same line and enables the line to operate with "wired-AND" logic. Therefore, these lines must be connected to VDD (supply voltage) with external pull-up resistors.
Operating Principle
- Start Condition: The master initiates communication by pulling the SDA line from high to low while the SCL line is high.
- Addressing: After the start condition, the master sends the 7-bit (or 10-bit) address of the slave device it wants to communicate with, followed by an R/W bit indicating a read (R) or write (W) operation.
- Acknowledgement (ACK): If the addressed slave device recognizes the address and is ready to communicate, it sends an ACK bit by pulling the SDA line low for one clock pulse.
- Data Transfer:
- Write Operation: The master sends data bytes to the slave device. After each byte, the slave device sends an ACK.
- Read Operation: The master receives data bytes from the slave device. After each byte, the master sends an ACK if it wants more data, or a NACK if it has received the last byte.
- Data bits are set on the SDA line while the SCL line is low and sampled on the rising edge of the SCL line. The most significant bit (MSB) is sent first.
- Stop Condition: The master terminates communication by pulling the SDA line from low to high while the SCL line is high.
- Repeated Start Condition: A master can send a repeated start condition to switch to another slave device or change the operation mode (read/write) with the same slave device, without terminating the current communication with a stop condition.
- Clock Stretching: If a slave device needs more time to process or send the next bit, it can temporarily hold the SCL line low, making the master wait. The master must wait for the SCL line to go high again.
Applications
I²C is used in a wide range of applications in embedded systems:
- Reading data from sensors such as temperature sensors, humidity sensors, accelerometers, and gyroscopes.
- Writing and reading data to EEPROM and flash memory chips.
- Setting and reading time and date information from real-time clocks (RTC).
- ADC (Analog-to-Digital Converter) and DAC (Digital-to-Analog Converter) control.
- LCD and OLED display controllers.
- Power management ICs (PMIC).
- Fan speed control and system status monitoring.
- Touch screen controllers.
Advantages and Disadvantages
Advantages | Disadvantages |
Low Pin Count: Uses only two lines (SDA and SCL), which saves pins on microcontrollers. | Speed Limitation: Slower than other protocols like SPI; provides 100 kbps in standard mode. |
Simplicity: Hardware and software implementation is relatively simple. | Distance Limitation: Reliability decreases over long distances due to bus capacitance. |
Multi-Device Support: Many devices can be connected to a single bus. | Complexity (Multi-Master Systems): Multi-master implementation is complex due to the arbitration mechanism. |
Acknowledgement Mechanism: Increases the reliability of data transfer. | Pull-up Resistors: Requires external pull-up resistors, which means additional cost and circuit complexity. |
Widespread Use: Supported by a large number of integrated circuits such as sensors, EEPROMs, and RTCs. | Address Conflicts: Multiple devices with the same address cannot be used on the same bus. |