Ocelot Quantum Chip

Amazon Web Services (AWS) announced on 27 February 2025 the Ocelot, its first-generation quantum chip, as a breakthrough in important computing. Developed by AWS’s Quantum Computing Center at its California Technology Institute, Ocelot introduces an innovative architecture designed to make quantum error correction more efficient and scalable. This chip holds the potential to accelerate progress toward practical applications of quantum computing and has drawn attention as part of the competition with technology giants such as Google like.

Quantum Chip Image

Quantum Error Correction Challenge and Ocelot’s Solution

Unlike classical computers that use bits with values of only 0 or 1, quantum computers use quantum bits (qubits), which can exist in multiple states simultaneously. This property enables quantum computers to solve certain complex problems exponentially faster than classical computers. However, qubits are extremely sensitive to environmental “noise” such as vibrations, heat, electromagnetic interference, and cosmic rays, which increase error rates. Even the best quantum hardware today can reliably operate only about a thousand quantum gates, while practical applications require billions.

To bridge this gap, quantum error correction methods have been developed. Traditional approaches aim to detect and correct errors by distributing the information of a single logical qubit across many physical qubits. Yet these methods impose a severe resource burden; for instance, standard techniques like the surface code may require hundreds or even thousands of physical qubits for each logical qubit. According to AWS, this implies that a commercially viable quantum computer would need millions of physical qubits—a figure far beyond current hardware capabilities.

Ocelot addresses this challenge with an alternative approach called bosonic quantum error correction. Instead of conventional two-state qubits, Ocelot constructs “cat qubits” that leverage multiple quantum states of harmonic oscillators. These cat qubits naturally suppress bit-flip errors—the same type of errors seen in classical bits. By increasing the number of photons in the oscillator, bit-flip error rates can be reduced exponentially. Phase-flip errors—unique to qubits—are detected and corrected using a simple classical error correction code known as repetition coding. AWS claims that this approach reduces the resources required for error correction by up to 90 percent compared to traditional methods.

The term “cat qubit” derives from Schrödinger’s Cat, a famous thought experiment in quantum mechanics. This term was chosen in quantum computing to describe a specific type of qubit used in bosonic error correction and carries both scientific and symbolic significance.

In quantum computing, the term “cat qubit” was inspired by the superposition concept in Schrödinger’s Cat. Unlike conventional two-state qubits (0 and 1), cat qubits utilize quantum states of harmonic oscillators. Specifically, they form a quantum superposition of two distinct classical-like states—for example, oscillation states with different amplitudes and phases. This superposition represents two opposing states coexisting simultaneously, much like Schrödinger’s cat being both alive and dead. Hence, these qubits are called “cat qubits,” and the term “cat” has become an established abbreviation in the literature.

Ocelot’s Technical Specifications and Performance

Ocelot is designed as a two-chip system built on superconducting quantum circuits. Each chip, approximately 1 cm² in size, is stacked and interconnected to form a chip stack. Quantum circuit elements on the chip surfaces consist of thin layers of superconducting materials. The core structure of Ocelot comprises 14 main components:

1. Five Cat Qubits (Data Qubits): These units store quantum information. Each cat qubit contains a harmonic oscillator made from a thin film of tantalum, a superconducting material. AWS materials scientists optimized tantalum’s performance on the silicon chip using a specialized fabrication technique. The oscillators generate repetitive electrical signals at fixed timing to preserve quantum states. Experimental results show these oscillators extend the bit-flip lifetime to about one second—1,000 times longer than conventional superconducting qubits. Meanwhile, the phase-flip lifetime is maintained at around 20 microseconds, sufficient for error correction.
2. Five Buffer Circuits: These are specialized nonlinear circuits connected to each cat qubit. They stabilize the cat qubit states and exponentially suppress bit-flip errors. This suppression remains effective even when the average photon number in the oscillator (cat amplitude) is kept low, such as at four, preserving the phase-flip lifetime.
3. Four Auxiliary Transmon Qubits (Ancilla Qubits): These are used to detect phase-flip errors. Transmon qubits are a conventional type of qubit widely used in superconducting quantum circuits. In Ocelot, high-noise-biased controlled-NOT (C-NOT) gates operate between each cat qubit and its neighboring transmon qubits. These gates detect phase-flip errors without compromising bit-flip protection and identify error locations as part of the repetition code.

To evaluate Ocelot’s performance, AWS shared experimental measurements published in Nature. The chip is designed as a logical qubit memory composed of a linear array of cat qubits and auxiliary qubits. During error correction cycles, when the repetition code distance increased from three (three cat qubits) to five (five cat qubits), the logical phase-flip error rates decreased significantly. The total logical error rate was measured at 1.72 percent per cycle for distance-3 and 1.65 percent for distance-5. The lower error rate of the distance-5 code stems from the noise bias of the C-NOT gates effectively suppressing bit-flip errors. This building allows the distance-5 code to operate with only nine qubits (five cat and four auxiliary), whereas a similar surface code would require 49 qubits—about one-fifth the number needed by Ocelot.

Scalability and Future in Quantum Computing

Although Ocelot stands out for its potential to enhance efficiency in quantum error correction architecture, it remains a laboratory prototype. AWS believes this chip represents the right scaling component for quantum computing, analogous to how transistors replaced vacuum tubes in classical computing. The company aims to exponentially reduce error rates in future versions of Ocelot and increase code distance to reach commercially valuable quantum computers. Oskar Painter, Director of Quantum Hardware at AWS, said, “Quantum error correction must be the priority. With Ocelot, we have taken a significant step on this path. This architecture could bring us within five years of a practical quantum computer.”

Competition and Global Perspective

The announcement of Ocelot comes amid intense competition in quantum computing. Microsoft previously introduced its quantum chip, highlighting broad applications from drug discovery to other fields. In 2024, Google revealed its Willow chip, claiming to have reduced error rates and performed a calculation that would take classical supercomputers millions of years in just minutes. USA and China are making massive investments in this domain, while Washington imposes export restrictions on sensitive technologies. With Ocelot, AWS aims to establish its position in this race by emphasizing resource efficiency.

Ocelot offers an innovative solution to the quantum error correction challenge and promises scalability. According to AWS, this chip could reduce the resources required for a fault-tolerant quantum computer by a factor of ten. However, further research and development are needed to transition the technology from the laboratory to real-world applications. The scientific community will continue to closely examine Ocelot’s performance and comparative results against other approaches. While AWS invites customers to explore the quantum world through its Amazon Braket service, it emphasizes that the journey in this field has only just begun.